The present invention generally relates to semiconductor devices and more particularly to a buffer structure interposed between an upper compound semiconductor layer and a lower material layer for eliminating defects from the upper compound semiconductor layer on which semiconductor devices are to be formed.
Gallium arsenide (GaAs) is a typical compound semiconductor material used for laser diodes and various fast speed semiconductor devices such as metal-semiconductor field effect transistor (MESFET), high electron mobility transistor (HEMT), heterojunction bipolar transistor (HBT) and the like because of its characteristic band structure and high electron mobility. Such a semiconductor device is constructed on a GaAs wafer sliced from a GaAs crystal ingot or on a GaAs layer grown epitaxially on a surface of a silicon wafer. In the latter construction, one can avoid the difficulty of handling the heavy and brittle GaAs wafer during the fabrication process of the device by using a light and strong silicon wafer fabricated by a well established process for the base of the wafer. Further, a large diameter wafer can be obtained easily in such a construction. As a result, one can handle the wafer easily and reduce the manufacturing cost of the device. Further, such a wafer is suited for fabrication of a so called optoelectronic integrated circuit (OEIC) device wherein a GaAs laser diode and the like are assembled together with silicon transistors on a common semiconductor chip.
When growing GaAs on silicon wafer, however, one encounters various difficulties. Such difficulties arises mainly due to the large differences in the lattice constants and thermal expansion coefficients, as between silicon and GaAs. For example, the lattice constant of silicon is smaller than that of GaAs by about 4% and the thermal expansion coefficient of silicon is smaller than that of GaAs by about 230%. From a simple calculation based on the difference in the lattice constant, it is predicted that the GaAs substrate, constructed as such, contains dislocations with a density in the order of 10.sup.12 /cm.sup.2. Thus, a simple growth of GaAs layer directly on silicon substrate is usually unsuccessful. Even if successful, such a layer involves significant defects and is useless for the substrate of a semiconductor device.
In order to eliminate these problems and to obtain a GaAs layer grown on the underlying silicon wafer, it is proposed to interpose a buffer layer between the silicon wafer and the GaAs layer so as to reduce defects caused as a result of the mismatch in the respective lattice constants and thermal expansion coefficients. In one example, it is proposed to interpose a GaAs buffer layer between the silicon substrate and the GaAs layer (Akiyama, M. et al., Ext. Abst., 18th Int. Conf. SSDM p.16, 1986). FIG. 1 shows a typical structure in which a thin buffer layer 2 of gallium arsenide is grown on a silicon wafer 1 and a gallium arsenide layer 3 serving as the substrate of semiconductor device. In this approach, the buffer layer 2 is deposited on the silicon wafer 1 in the amorphous state to a thickness of about 100-200 .ANG. at a temperature of about 400.degree. C.-450.degree. C. and then the gallium arsenide layer 3 is grown to a thickness of about 3-5 .mu.m. When the gallium arsenide layer 3 is grown, the underlying gallium arsenide buffer layer 2 is crystallized into a single crystal phase and the gallium arsenide substrate layer 3 deposited thereon grows while maintaining an epitaxial relation with the gallium arsenide buffer layer 2 underneath.
In the foregoing method, although the gallium arsenide layer 3 is grown successfully on the silicon wafer 1, there is a problem in that the dislocation density in the gallium arsenide layer grown on the substrate cannot be reduced below about 10.sup.8 /cm.sup.2. Such a dislocation occurs mainly at the interface between the silicon wafer 1 and the buffer layer 2 as illustrated in FIG. 1 by a line 4, due to the lattice mismatch between silicon and GaAs. The buffer layer 2 is thus not effective in intercepting the propagation of the dislocations, and the dislocations extend into the gallium arsenide layer 3 on which the semiconductor devices are to be formed. In addition to the dislocations originating at the foregoing interface 4, dislocations are also created due to the surface defects or intrinsic defects involved in the wafer 1. The problem of the latter type of dislocations becomes conspicuous when a single crystal gallium arsenide wafer is used in place of the silicon wafer 1.
In a semiconductor device, such as a field effect transistor (FET) formed on the gallium arsenide layer 3, the threshold voltage scatters unacceptably when the dislocation density exceeds about 10.sup.6 cm.sup.-2 and accordingly, the yield of the fabricated semiconductor device is inevitably decreased. Further, the existence of the dislocations causes a decrease of lifetime of the carrier or an increase of the leakage current across the p-n junction. When the device is an optical semiconductor device such as laser diode, the optical output is also decreased.
Meanwhile, it is known that the dislocation density of a GaAs bulk crystal grown by the Czochralski method can be reduced to about 100 cm.sup.-2 by adding indium (In) with a concentration level of 2.times.10.sup.19 cm.sup.-2 (Mil'vidsky, M. G., Osvensky, V. B. and Shifrin, S. S., J. Crystal. Growth, 52, p.396, 1981). However, the wafer sliced from such a bulk crystal has a composition of InGaAs and the utility of the wafer is limited. Further, addition of In to the GaAs layer grown on another GaAs buffer layer as in the case of FIG. 1 is generally unsuccessful as the addition of In in such a concentration, or amount, inevitably causes an unacceptable lattice mismatch. Even when successful, the growth of the GaAs layer containing In would create a significant amount of dislocations at the boundary with the underlying layer, with a worse result. Growth of another GaAs layer on the buffer layer thus added with In is not possible because of the same reason.